Make sure a default condition is declared in an case-statement: always begin A coding style change can remove the infered latch and there are two main ways to do so.Īssign the outputs in every condition. Most FPGAs have a limited number of latches and some have some. Latch logic designs are prone to timing issues and need to be used with caution. Out and oCarry are not assigned a known value in every condition, this infers them as latches. Non-blocking should be used to assign flip-flops and latches. You should not use non-blocking assignments ( Auto-sensitivity ( or was added to the standard in 2001. you should always use auto-sensitivity for combinational logic unless you are limited to the 1995 version of the IEEE Std 1364 (odds are you are not), in which case you need always or iA or iB or iCin). With always the simulator will not use see changes in iA or iB. Combinational block need to declare all elements in the sensitivity list or use auto-sensitivity. As Qiu pointed out, iA~|iB should be ~(iA|iB) and you are missing an endcase.
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